1. Field of the Invention
The present invention relates to a semiconductor memory device having a self-refresh control circuit, and in particular to a semiconductor memory device having a self-refresh control circuit which can considerably reduce power consumption of word lines.
2. Description of the Background Art
FIG. 1 is a block diagram illustrating a semiconductor memory device having a conventional self-refresh control circuit. As shown therein, the semiconductor memory device having the self-refresh control circuit includes: a first to the n-th banks BANK0.about.BANKn consisting of a plurality of memory array blocks including a memory cell array, a sub-word line driving circuit and a sense amplifier; and a first to the n-th global word lines GWL0.about.GWLn receiving a first to the m-th word line driving signals WLEN0.about.WLENm, and sequentially accessed according to addresses.
The operation of the semiconductor memory device having the conventional self-refresh control circuit will now be described with reference to the accompanying drawings.
As depicted in a first section T1 of FIG. 2, when the first word line GWL0 is selected by an address, the first to n-th banks BANK0.about.BANKn are sequentially accessed, and thus carry out a refresh operation. In a second section T2, the second word line GWL1 is selected according to a next address. Again, the first to n-th banks BANK0.about.BANKn are sequentially accessed, and perform the refresh operation. The above operation is repeatedly carried out until the n-th word line GWLn is selected, thus refreshing the data stored in the memory cells of all the banks.
Here, the word line driving signals WLEN0.about.WLGNm are signals determining which sub-word line among the plurality of sub-word lines connected to the selected global word line is selected.
Accordingly, in the memory cells of the semiconductor memory device, the first to n-th banks BANK0.about.BANKn are sequentially accessed to a single global word line. When the n-th bank BANKn is finally accessed, the first to n-th banks BANK0.about.BANKn are sequentially accessed to a next global word line. As a result, the data of the memory cells of the semiconductor memory device are all refreshed.
However, the semiconductor memory device having a structure of the plurality of banks as described above has a disadvantage in that a high voltage and a high voltage word line driving signal must be applied to each bank during the self-refresh operation, which results in excessive power consumption.